1. Field of the Invention
This invention relates to analog to digital converters, ADCs, and in particular to switched capacitor ADCs. The invention is directed to reduction of the comparator power requirement in ADCs, especially ADCs of the foregoing kind.
The invention is especially directed to successive approximation register (SAR) type ADCs.
2. Description of the Prior Art
In ADCs of the kind to which the invention is directed, it has been found that the component requiring a significant level of power input is the comparator. A particular reason for the comparator requiring significant power input is that it serves to autozero the capacitor array of the digital to analog converter portion of the ADC. In order to facilitate achievement of the autozero operation in a sufficiently speedy manner, the comparator requires to be a large device running at a high current level.